Accepted papers of JRWRTC22

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Title Authors
An automata-based method for interference analysis in multi-core processors Thomas Beck, Frédéric Boniol, Jérôme Ermont, Luc Maillet and Franck Wartel
Data Access Time Estimation in Automotive LET Scheduling with Multi-core CPU Risheng Xu, Max J. Friese, Hermann von Hasseln and Dirk Nowotka
Joint Scheduling, Routing and Gateway Designation in Real-Time TSCH Networks Miguel Gutierrez Gaitan, Luis Almeida, Thomas Watteyne, Pedro M. d’Orey, Pedro M. Santos and Diego Dujovne
Toward Precise Real-Time Scheduling on NVidia GPUs Nordine Feddal, Houssam-Eddine Zahaf and Giuseppe Lipari
Shortening gate closing time to limit bandwidth waste when implementing Time-Triggered scheduling in TAS/TSN Pierre-Julien Chaine and Marc Boyer

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